ADA4930-2YCPZ-R2 Analog Devices IC DIFF AMP 1.35GHZ 24-LFCSP

label:
2026/02/2 3
ADA4930-2YCPZ-R2 Analog Devices IC DIFF AMP 1.35GHZ 24-LFCSP


• Low input voltage noise: 1.2 nV/√Hz
• Low common-mode output: 0.9 V on single supply
• 0.5 mV typical offset voltage
• Externally adjustable gain
• Adjustable output common-mode voltage


CATALOG
ADA4930-2YCPZ-R2 COUNTRY OF ORIGIN
ADA4930-2YCPZ-R2 PARAMETRIC INFO
ADA4930-2YCPZ-R2 PACKAGE INFO
ADA4930-2YCPZ-R2 MANUFACTURING INFO
ADA4930-2YCPZ-R2 PACKAGING INFO
ADA4930-2YCPZ-R2 ECAD MODELS
ADA4930-2YCPZ-R2 APPLICATIONS


COUNTRY OF ORIGIN
Korea (Republic of)


PARAMETRIC INFO
Type Differential Amplifier
Number of Elements per Chip 2
Number of Channels per Chip 2
Minimum PSRR (dB) 71(Max)
Output Type Differential
Maximum Input Offset Voltage (mV) 3.1@5V
Maximum Input Bias Current (uA) 34(Min)@5V
Minimum CMRR (dB) 77(Max)
Minimum CMRR Range (dB) 75 to 85
Output Logic Level CML
Maximum Quiescent Current (mA) 76.8@5V
Process Technology <2.5um
Typical Output Current (mA) 30@5V
Maximum Input Resistance (MOhm) 3(Typ)@5V
Maximum Voltage Gain Range (dB) 60 to 75
Typical Slew Rate (V/us) 3400@5V
Typical Input Offset Current (uA) 0.1@5V
Maximum Input Offset Current (uA) 0.82@5V
Maximum Voltage Gain (dB) 64(Typ)
Minimum Operating Temperature (°C) -40
Maximum Operating Temperature (°C) 105
Minimum Storage Temperature (°C) -65
Maximum Storage Temperature (°C) 125
Power Supply Type Single
Maximum Supply Voltage Range (V) 5 to 7
Typical Single Supply Voltage (V) 3.3|5
Maximum Single Supply Voltage (V) 5.5
Maximum Operating Supply Voltage (V) 5.5


PACKAGE INFO
Supplier Package LFCSP EP
Basic Package Type Non-Lead-Frame SMT
Pin Count 24
Lead Shape No Lead
PCB 24
Tab N/R
Pin Pitch (mm) 0.5
Package Length (mm) 4
Package Width (mm) 4
Package Height (mm) 0.73
Package Diameter (mm) N/R
Package Overall Length (mm) 4
Package Overall Width (mm) 4
Package Overall Height (mm) 0.75
Seated Plane Height (mm) 0.75
Mounting Surface Mount
Terminal Width (mm) 0.25
Package Weight (g) N/A
Package Material Plastic
Package Description Lead Frame Chip Scale Package, Exposed Pad
Package Family Name CSP
Jedec MO-220WGGD-8
Package Outline Link to Datasheet
Maximum PACKAGE_DIMENSION_L (mm) 4.1
Minimum PACKAGE_DIMENSION_L (mm) 3.9
Maximum PACKAGE_DIMENSION_W (mm) 4.1
Minimum PACKAGE_DIMENSION_W (mm) 3.9
Maximum Diameter (mm) N/R
Minimum Diameter (mm) N/R
Minimum Seated_Plane_Height (mm) 0.7
Minimum PACKAGE_DIMENSION_H (mm) N/A
Maximum PACKAGE_DIMENSION_H (mm) 0.75
Maximum Seated_Plane_Height (mm) 0.8


MANUFACTURING INFO
MSL 3
Maximum Reflow Temperature (°C) 260
Reflow Solder Time (Sec) 30
Number of Reflow Cycle 3
Standard J-STD-020D
Maximum Wave Temperature (°C) N/R
Wave Solder Time (Sec) N/R
Lead Finish(Plating) Matte Sn annealed
Under Plating Material Ag
Terminal Base Material Cu Alloy
Number of Wave Cycles N/R


PACKAGING INFO
Packaging Suffix R2
Packaging Tape and Reel
Quantity Of Packaging 250
Reel Diameter (in) 13
Packaging Document Link to Datasheet
 
ECAD MODELS


APPLICATIONS
• ADC drivers
• Single-ended-to-differential converters
• IF and baseband gain blocks  
• Differential buffers
• Line drivers
Продукт RFQ