| Process Technology |
CMOS |
| Logic Family |
AHCT |
| Logic Function |
Buffer/Line Driver |
| Input Signal Type |
Single-Ended |
| Output Type |
3-State |
| Polarity |
Non-Inverting |
| Bus Hold |
No |
| Number of Elements per Chip |
4 |
| Number of Channels per Chip |
4 |
| Number of Output Enables per Chip |
4 Low |
| Number of Input Enables per Chip |
0 |
| Number of Inputs per Chip |
4 |
| Number of Outputs per Chip |
4 |
| Minimum Operating Supply Voltage (V) |
4.5 |
| Maximum Operating Supply Voltage (V) |
5.5 |
| Typical Operating Supply Voltage (V) |
5 |
| Minimum Operating Temperature (°C) |
-40 |
| Maximum Operating Temperature (°C) |
125 |
| Maximum Power Dissipation (mW) |
500 |
| Maximum Propagation Delay Time @ Maximum CL (ns) |
7.5@4.5V to 5.5V |
| Absolute Propagation Delay Time (ns) |
11 |
| Propagation Delay Test Condition (pF) |
50 |
| Maximum High Level Output Current (mA) |
-8 |
| Maximum Low Level Output Current (mA) |
8 |
| Maximum Quiescent Current (uA) |
2 |