|
| |
• High-performance, EEPROM-based programmable logic devices(PLDs) based on second-generation MAX® architecture
|
• 5.0-V in-system programmability (ISP) through the built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface available in MAX 7000S devices– ISP circuitry compatible with IEEE Std. 1532
|
• Includes 5.0-V MAX 7000 devices and 5.0-V ISP-based MAX 7000S devices
|
| • Built-in JTAG boundary-scan test (BST) circuitry in MAX7000S devices with 128 or more macrocells |
| • Complete EPLD family with logic densities ranging from 600 to 5,000 usable gates (see Tables 1 and 2) |
| • 5-ns pin-to-pin logic delays with up to 175.4-MHz counter frequencies (including interconnect) |
| • PCI-compliant devices available |
| |
| CATALOG |
| EPM7128SQC100-15 COUNTRY OF ORIGIN |
| EPM7128SQC100-15 LIFECYCLE |
EPM7128SQC100-15 PARAMETRIC INFO
|
EPM7128SQC100-15 PACKAGE INFO
|
EPM7128SQC100-15 MANUFACTURING INFO
|
EPM7128SQC100-15 PACKAGING INFO
|
|
| COUNTRY OF ORIGIN |
| Indonesia |
| Philippines |
| Taiwan (Province of China) |
| Malaysia |
| Thailand |
| Korea (Republic of) |
|
| LIFECYCLE |
Obsolete
Jun 01,2017 |
| |
PARAMETRIC INFO
|
| Device System Gates |
2500 |
| Number of User I/Os |
84 |
| Number of Logic Blocks/Elements |
8 |
| Number of Macro Cells |
128 |
| Number of Product Terms per Macro |
32 |
| Tradename |
MAX |
| Copy Protection |
Yes |
| Number of Global Clocks |
2 |
| Program Memory Type |
EEPROM |
| Family Name |
MAX® 7000S |
| Process Technology |
CMOS |
| Speed Grade |
15 |
| Data Gate |
No |
| Individual Output Enable Control |
Yes |
| Programmability |
Yes |
| In-System Programmability |
Yes |
| Reprogrammability Support |
Yes |
| Maximum Internal Frequency (MHz) |
100 |
| Maximum Operating Frequency (MHz) |
76.9 |
| Maximum Clock to Output Delay (ns) |
8 |
| Maximum Propagation Delay Time (ns) |
15 |
| Tolerant Configuration Interface Voltage (V) |
2.5|3.3|5 |
| I/O Voltage (V) |
3.3|5 |
| Minimum Operating Supply Voltage (V) |
4.75 |
| Typical Operating Supply Voltage (V) |
5 |
| Maximum Operating Supply Voltage (V) |
5.25 |
| Minimum Operating Temperature (°C) |
0 |
| Maximum Operating Temperature (°C) |
70 |
| Temperature Flag |
Opr |
| Supplier Temperature Grade |
Commercial |
| Minimum Storage Temperature (°C) |
-65 |
| Maximum Storage Temperature (°C) |
150 |
|
|
PACKAGE INFO
|
| Supplier Package |
PQFP |
| Basic Package Type |
Lead-Frame SMT |
| Pin Count |
100 |
| Lead Shape |
Gull-wing |
| PCB |
100 |
| Tab |
N/R |
| Pin Pitch (mm) |
0.65 |
| Package Length (mm) |
20 |
| Package Width (mm) |
14 |
| Package Height (mm) |
2.7 |
| Package Diameter (mm) |
N/R |
| Package Overall Length (mm) |
23.2 |
| Package Overall Width (mm) |
17.2 |
| Package Overall Height (mm) |
3.4(Max) |
| Seated Plane Height (mm) |
3.4(Max) |
| Mounting |
Surface Mount |
| Package Material |
Plastic |
| Package Description |
Plastic Quad Flat Package |
| Package Family Name |
QFP |
| Jedec |
MO-112CC-1 |
| Package Outline |
Link to Datasheet |
|
|
MANUFACTURING INFO
|
| MSL |
3 |
| Maximum Reflow Temperature (°C) |
220 |
| Reflow Solder Time (Sec) |
20 |
| Number of Reflow Cycle |
3 |
| Standard |
N/A |
| Reflow Temp. Source |
Link to Datasheet |
| Maximum Wave Temperature (°C) |
N/R |
| Wave Solder Time (Sec) |
N/R |
| Lead Finish(Plating) |
SnPb |
| Under Plating Material |
Ag |
| Terminal Base Material |
Cu Alloy |
| Number of Wave Cycles |
N/R |
|
|
PACKAGING INFO
|
|
|
|
One-stop supplier of IC products