M4A5-128/64-10YNC Lattice IC CPLD 128MC 10NS 100QFP

label:
2024/01/22 276



◆ High-performance, E2 CMOS 3.3-V & 5-V CPLD families
◆ Flexible architecture for rapid logic designs
   — Excellent First-Time-FitTM and refit feature
   — SpeedLockingTM performance for guaranteed fixed timing
   — Central, input and output switch matrices for 100% routability and 100% pin-out retention
◆ High speed
   — 5.0ns tPD Commercial and 7.5ns tPD Industrial
   — 182MHz fCNT
◆ 32 to 512 macrocells; 32 to 768 registers
◆ 44 to 388 pins in PLCC, PQFP, TQFP, BGA, fpBGA and caBGA packages
◆ Flexible architecture for a wide range of design styles
   — D/T registers and latches
   — Synchronous or asynchronous mode
   — Dedicated input registers
   — Programmable polarity
   — Reset/ preset swapping
◆ Advanced capabilities for easy system integration
   — 3.3-V & 5-V JEDEC-compliant operations
   — JTAG (IEEE 1149.1) compliant for boundary scan testing
   — 3.3-V & 5-V JTAG in-system programming
   — PCI compliant (-5/-55/-6/-65/-7/-10/-12 speed grades)
   — Safe for mixed supply voltage system designs
   — Programmable pull-up or Bus-FriendlyTM inputs and I/Os
   — Hot-socketing
  — Programmable security bit
   — Individual output slew rate control
◆ Advanced E2 CMOS process provides high-performance, cost-effective solutions
◆ Lead-free package options  



CATALOG
M4A5-128/64-10YNC COUNTRY OF ORIGIN
M4A5-128/64-10YNC LIFECYCLE
M4A5-128/64-10YNC PARAMETRIC INFO
M4A5-128/64-10YNC PACKAGE INFO  
M4A5-128/64-10YNC MANUFACTURING INFO
M4A5-128/64-10YNC PACKAGING INFO



COUNTRY OF ORIGIN
Malaysia
Singapore
Indonesia
Taiwan (Province of China)



LIFECYCLE
LTB
Jun 27,2024



PARAMETRIC INFO
Device System Gates 5000
Number of User I/Os 64
Number of Macro Cells 128
Number of Product Terms per Macro 20
Number of Flip Flops 192
Copy Protection Yes
Number of Global Clocks 4
Tradename ispMACH
Program Memory Type EEPROM
Family Name ispMACH 4A
Speed Grade 10
Data Gate No
Individual Output Enable Control Yes
Programmability Yes
In-System Programmability Yes
Reprogrammability Support Yes
Maximum Internal Frequency (MHz) 100|125
Maximum Operating Frequency (MHz) 83.3|118
Maximum Clock to Output Delay (ns) 11|6
Maximum Propagation Delay Time (ns) 10
Tolerant Configuration Interface Voltage (V) 5
Minimum Operating Supply Voltage (V) 4.75
Typical Operating Supply Voltage (V) 5
Programmable Type In System Programmable
Maximum Operating Supply Voltage (V) 5.25
Minimum Operating Temperature (°C) 0
Maximum Operating Temperature (°C) 70
Temperature Flag Opr
Supplier Temperature Grade Commercial
Minimum Storage Temperature (°C) -65
Maximum Storage Temperature (°C) 150
 


PACKAGE INFO
Supplier Package PQFP
Basic Package Type Lead-Frame SMT
Pin Count 100
Lead Shape Gull-wing
PCB 100
Tab N/R
Pin Pitch (mm) 0.65
Package Length (mm) 20
Package Width (mm) 14
Package Height (mm) 2.7
Package Diameter (mm) N/R
Seated Plane Height (mm) 3.1(Max)
Mounting Surface Mount
Package Weight (g) N/A
Package Material Plastic
Package Description Plastic Quad Flat Package
Package Family Name QFP
Jedec MO-112CC-1
Package Outline Link to Datasheet
 


MANUFACTURING INFO
MSL 3
Maximum Reflow Temperature (°C) 245
Reflow Solder Time (Sec) 30
Number of Reflow Cycle 3
Standard J-STD-020C
Reflow Temp. Source Link to Datasheet
Maximum Wave Temperature (°C) N/R
Wave Solder Time (Sec) N/R
Lead Finish(Plating) Matte Sn annealed
Under Plating Material N/A
Terminal Base Material Cu Alloy
Number of Wave Cycles N/R
 


PACKAGING INFO
Packaging Tray
Quantity Of Packaging 66
 

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