| Density (bit) |
64M |
| Cell Type |
NOR |
| Interface Type |
Parallel |
| Block Organization |
Asymmetrical |
| Boot Block |
Yes |
| Timing Type |
Asynchronous |
| Architecture |
Sectored |
| Maximum Access Time (ns) |
70 |
| Programmability |
Yes |
| Typical Operating Supply Voltage (V) |
3|3.3 |
| Minimum Operating Temperature (°C) |
-40 |
| Maximum Operating Temperature (°C) |
85 |
| Supplier Temperature Grade |
Industrial |
| Number of Bits per Word (bit) |
8/16 |
| Number of Words |
8M/4M |
| Location of Boot Block |
Bottom |
| Maximum Operating Current (mA) |
16 |
| Programming Voltage (V) |
2.7 to 3.6 |
| Sector Size |
8Kbyte x 8|64Kbyte x 127 |
| OE Access Time (ns) |
30 |
| Program Current (mA) |
30 |
| Address Width (bit) |
22 |
| Number of Banks |
4 |
| Minimum Operating Supply Voltage (V) |
2.7 |
| Maximum Operating Supply Voltage (V) |
3.6 |
| Maximum Erase Time (s) |
65/Chip |
| Maximum Programming Time (ms) |
160000/Chip |
| Command Compatible |
Yes |
| ECC Support |
No |
| Erase Suspend/Resume Modes Support |
Yes |
| Simultaneous Read/Write Support |
No |
| Support of Common Flash Interface |
Yes |
| Support of Page Mode |
No |
| Minimum Endurance (Cycles) |
100000(Typ) |
| Minimum Storage Temperature (°C) |
-65 |
| Maximum Storage Temperature (°C) |
150 |
| Density in Bits (bit) |
67108864 |
| Process Technology |
130nm |
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