| Logic Function |
Multiplexer |
| Configuration |
6 x 2:1 |
| Number of Elements per Chip |
1 |
| Number of Inputs per Chip |
12 |
| Typical Supply Current (mA) |
16 |
| Number of Outputs per Chip |
6 |
| Maximum Supply Current (mA) |
33 |
| Number of Input Enables per Element |
0 |
| Number of Output Enables per Element |
0 |
| Number of Selection Inputs per Element |
2 |
| Input Signal Type |
Single-Ended |
| Output Signal Type |
Single-Ended |
| Output Type |
3-State |
| Parity Invert Input |
Yes |
| Polarity |
Inverting|Non-Inverting |
| Logic Family |
ALS |
| Minimum Operating Supply Voltage (V) |
4.5 |
| Maximum Operating Supply Voltage (V) |
5.5 |
| Typical Operating Supply Voltage (V) |
5 |
| Power Supply Type |
Single |
| Minimum Operating Temperature (°C) |
0 |
| Maximum Operating Temperature (°C) |
70 |
| Supplier Temperature Grade |
Commercial |
| Maximum Propagation Delay Time @ Maximum CL (ns) |
25@4.5V to 5.5V |
| Absolute Propagation Delay Time (ns) |
37 |
| Propagation Delay Test Condition (pF) |
50 |
| Maximum High Level Output Current (mA) |
-2.6 |
| Maximum Low Level Output Current (mA) |
24 |
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