SN74AUP3G04DCUR Texas Instruments LOW-POWER TRIPLE INVERTER GATE

2025/04/21 51

CATALOG

Thailand

Logic Family	AUP
Process Technology	CMOS
Logic Function	Inverter
Output Type	Push-Pull
Number of Elements per Chip	3
Minimum Operating Supply Voltage (V)	0.8
Maximum Operating Supply Voltage (V)	3.6
Typical Operating Supply Voltage (V)	1.8\|2.5\|3.3
Minimum Storage Temperature (°C)	-65
Maximum Storage Temperature (°C)	150
Minimum Operating Temperature (°C)	-40
Maximum Operating Temperature (°C)	85
Maximum Propagation Delay Time @ Maximum CL (ns)	20.9@1.2V\|14.2@1.5V\|11@1.8V\|7.6@2.5V\|6.2@3.3V
Absolute Propagation Delay Time (ns)	25.5
Propagation Delay Test Condition (pF)	30
Maximum High Level Output Current (mA)	-4
Maximum Low Level Output Current (mA)	4
Maximum Quiescent Current (uA)	0.5

Supplier Package	VSSOP
Basic Package Type	Lead-Frame SMT
Pin Count	8
Lead Shape	Gull-wing
PCB	8
Tab	N/R
Pin Pitch (mm)	0.5
Package Length (mm)	2.1(Max)
Package Width (mm)	2.4(Max)
Package Height (mm)	0.8(Max)
Package Diameter (mm)	N/R
Package Overall Length (mm)	2.1(Max)
Package Overall Width (mm)	3.2(Max)
Package Overall Height (mm)	0.9(Max)
Seated Plane Height (mm)	0.9(Max)
Mounting	Surface Mount
Package Weight (g)	N/A
Package Material	Plastic
Package Description	Very Thin Shrink Small Outline Package
Package Family Name	SO
Jedec	MO-187CA
Package Outline	Link to Datasheet

MSL	1
Maximum Reflow Temperature (°C)	260
Reflow Solder Time (Sec)	30
Number of Reflow Cycle	3
Standard	J-STD-020D
Reflow Temp. Source	Link to Datasheet
Maximum Wave Temperature (°C)	N/R
Wave Solder Time (Sec)	N/R
Lead Finish(Plating)	Au
Under Plating Material	Pd over Ni
Terminal Base Material	Cu Alloy