|
|
• ESD protection exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
|
| • Available in the Texas Instruments NanoFree™
package |
| • Fully configurable dual-rail design allows each port
to operate over the full 1.65-V to 5.5-V powersupply range |
| • VCC isolation feature – if either VCC input is at
GND, both ports are in the high-impedance state |
| • DIR input circuit referenced to VCCA |
| • Low power consumption, 4-µA maximum ICC |
| • ±24-mA output drive at 3.3 V |
| • Ioff supports partial-power-down mode operation
|
• Maximum data rates
– 420 Mbps (3.3-V to 5-V translation)
– 210 Mbps (translate to 3.3 V)
– 140 Mbps (translate to 2.5 V)
– 75 Mbps (translate to 1.8 V)
|
| • Latch-up performance exceeds 100 mA per JESD
78, Class II
|
|
| CATALOG |
| SN74LVC1T45DCKR COUNTRY OF ORIGIN |
| SN74LVC1T45DCKR PARAMETRIC INFO |
| SN74LVC1T45DCKR PACKAGE INFO |
| SN74LVC1T45DCKR MANUFACTURING INFO |
| SN74LVC1T45DCKR PACKAGING INFO |
| SN74LVC1T45DCKR ECAD MODELS |
| SN74LVC1T45DCKR FUNCTIONAL BLOCK DIAGRAM
|
| SN74LVC1T45DCKR APPLICATIONS |
|
| COUNTRY OF ORIGIN |
| China |
| Malaysia |
| Thailand |
| United States of America |
|
| PARAMETRIC INFO |
| Number of Channels |
1 |
| Channel Type |
Bidirectional |
| Logic Family |
LVC |
| Process Technology |
CMOS |
| Logic Function |
Voltage Level Translator |
| Output Type |
3-State |
| Minimum High Level Input Voltage (V) |
1.7 |
| Minimum Latch-Up Current (mA) |
100 |
| Minimum Operating Temperature (°C) |
-40 |
| Maximum Operating Temperature (°C) |
85 |
| Minimum Storage Temperature (°C) |
-65 |
| Maximum Storage Temperature (°C) |
150 |
| Minimum Operating Supply Voltage (V) |
1.65 |
| Maximum Operating Supply Voltage (V) |
5.5 |
| Typical Operating Supply Voltage (V) |
1.8|2.5|3.3|5 |
| Maximum High Level Output Current (mA) |
-32 |
| Maximum Low Level Output Current (mA) |
32 |
| Maximum Quiescent Current (mA) |
0.004 |
| Maximum Propagation Delay Time @ Maximum CL (ns) |
17.7@1.8V |
| Absolute Propagation Delay Time (ns) |
36.2 |
|
| |
| PACKAGE INFO |
| Supplier Package |
SC-70 |
| Basic Package Type |
Lead-Frame SMT |
| Pin Count |
6 |
| Lead Shape |
Gull-wing |
| PCB |
6 |
| Tab |
N/R |
| Pin Pitch (mm) |
0.65 |
| Package Length (mm) |
2.15(Max) |
| Package Width (mm) |
1.4(Max) |
| Package Height (mm) |
1(Max) |
| Package Diameter (mm) |
N/R |
| Package Overall Length (mm) |
2.15(Max) |
| Package Overall Width (mm) |
2.4(Max) |
| Package Overall Height (mm) |
1.1(Max) |
| Seated Plane Height (mm) |
1.1(Max) |
| Mounting |
Surface Mount |
| Package Weight (g) |
N/A |
| Package Material |
Plastic |
| Package Description |
Small Outline Transistor |
| Package Family Name |
SOT |
| Jedec |
MO-203AB |
| Package Outline |
Link to Datasheet |
|
| |
| MANUFACTURING INFO |
| MSL |
1 |
| Maximum Reflow Temperature (°C) |
260 |
| Reflow Solder Time (Sec) |
30 |
| Number of Reflow Cycle |
3 |
| Standard |
J-STD-020D |
| Reflow Temp. Source |
Link to Datasheet |
| Maximum Wave Temperature (°C) |
N/R |
| Wave Solder Time (Sec) |
N/R |
| Lead Finish(Plating) |
Matte Sn|Au |
| Under Plating Material |
N/A|Pd over Ni |
| Terminal Base Material |
Cu Alloy |
| Number of Wave Cycles |
N/R |
|
| |
| PACKAGING INFO |
| Packaging Suffix |
R |
| Packaging |
Tape and Reel |
| Quantity Of Packaging |
3000 |
| Reel Diameter (in) |
7 |
| Reel Width (mm) |
8.4|9|9.2 |
| Tape Pitch (mm) |
4 |
| Tape Width (mm) |
8 |
| Component Orientation |
Q3 |
| Packaging Document |
Link to Datasheet |
|
| |
| ECAD MODELS |
|
|
| FUNCTIONAL BLOCK DIAGRAM
|
|
|
| APPLICATIONS |
| • Personal electronic |
| • Industrial |
| • Enterprise |
| • Telecom |
|