SN74LVC8T245PWR Texas Instruments IC TRNSLTR BIDIRECTIONAL 24TSSOP

label:
2023/12/4 192


• Control inputs VIH/VIL levels are referenced to VCCA voltage
• VCC isolation feature – if either VCC input is at GND, all are in the high-impedance state
• Fully configurable dual-rail design allows each port to operate over the full 1.65-V to 5.5-V powersupply range
• Latch-up performance exceeds 100 mA per JESD 78, class II
• ESD protection exceeds JESD 22
   – 4000-V Human-Body Model (A114-A)
   – 100-V Machine Model (A115-A)
   – 1000-V Charged-Device Model (C101)


CATALOG
SN74LVC8T245PWR COUNTRY OF ORIGIN
SN74LVC8T245PWR PARAMETRIC INFO
SN74LVC8T245PWR PACKAGE INFO
SN74LVC8T245PWR MANUFACTURING INFO
SN74LVC8T245PWR PACKAGING INFO
SN74LVC8T245PWR ECAD MODELS
SN74LVC8T245PWR FUNCTIONAL BLOCK DIAGRAM
SN74LVC8T245PWR APPLICATIONS


COUNTRY OF ORIGIN
China
Malaysia
Taiwan (Province of China)
Thailand


PARAMETRIC INFO
Number of Channels 8
Channel Type Bidirectional
Logic Family LVC
Process Technology CMOS
Logic Function Voltage Level Translator
Output Type 3-State
Minimum High Level Input Voltage (V) 1.7
Minimum Latch-Up Current (mA) 100
Minimum Operating Temperature (°C) -40
Maximum Operating Temperature (°C) 85
Supplier Temperature Grade Commercial
Minimum Storage Temperature (°C) -65
Maximum Storage Temperature (°C) 150
Minimum Operating Supply Voltage (V) 1.65
Maximum Operating Supply Voltage (V) 5.5
Typical Operating Supply Voltage (V) 1.8|2.5|3.3|5
Maximum High Level Output Current (mA) -32
Maximum Low Level Output Current (mA) 32
Maximum Quiescent Current (mA) 0.015
Maximum Propagation Delay Time @ Maximum CL (ns) 23.8@1.8V
Absolute Propagation Delay Time (ns) 32.2
 
PACKAGE INFO
Supplier Package TSSOP
Basic Package Type Lead-Frame SMT
Pin Count 24
Lead Shape Gull-wing
PCB 24
Tab N/R
Pin Pitch (mm) 0.65
Package Length (mm) 7.9(Max)
Package Width (mm) 4.5(Max)
Package Height (mm) 1.05(Max)
Package Diameter (mm) N/R
Package Overall Length (mm) 7.9(Max)
Package Overall Width (mm) 6.6(Max)
Package Overall Height (mm) 1.2(Max)
Seated Plane Height (mm) 1.2(Max)
Mounting Surface Mount
Package Weight (g) N/A
Package Material Plastic
Package Description Thin Shrink Small Outline Package
Package Family Name SO
Jedec MO-153AD
Package Outline Link to Datasheet
 
MANUFACTURING INFO
MSL 1
Maximum Reflow Temperature (°C) 260
Reflow Solder Time (Sec) 30
Number of Reflow Cycle 3
Standard J-STD-020D
Reflow Temp. Source Link to Datasheet
Maximum Wave Temperature (°C) N/R
Wave Solder Time (Sec) N/R
Lead Finish(Plating) Au
Under Plating Material Pd over Ni
Terminal Base Material Cu Alloy
Number of Wave Cycles N/R
 
PACKAGING INFO
Packaging Suffix R
Packaging Tape and Reel
Quantity Of Packaging 2000
Reel Diameter (in) 13
Reel Width (mm) 16.4
Tape Pitch (mm) 8
Tape Width (mm) 16
Component Orientation Q1
Packaging Document Link to Datasheet
 
ECAD MODELS


FUNCTIONAL BLOCK DIAGRAM


APPLICATIONS
• Personal electronic
• Industrial
• Enterprise
• Telecom  


Продукт RFQ